| Abstract: |
| In this paper, the focus is on the Abort-and-Restart Policy (ANR), which is neither a concurrency control scheme nor a true scheduling policy. Instead, it is a policy in which the most important task (or thread) is scheduled first. A higher-priority task will force a lower-priority task to release the processor so it can run. So by its nature, ANR eliminates the priority inversion problem, where a higher priority task is blocked by lower-priority tasks due to resource sharing. The lower-priority task restarts once the higher-priority task is done. ANR makes it possible to treat programs as functions (stateless), and thus amenable to proofs and type-safety. However, the model often leads to non-sustainable analysis, because the response time of a lower-priority task increases with each abort-and-restart. In this paper, we present a number of variations on the abort-and-restart model. |
| Abstract: |
| Smarter and more precise embedded real-time sensors are making consistent inroads into automobiles. Acceleration and speed sensors are frequently used in many different applications, from improving engine performance through intelligent safety systems to helping to provide creature comforts. Speed sensing has two major applications area: engine speed monitoring to enhance engine control, and antilock braking and traction control systems for improved road performance and handling. Intelligent acceleration and crash sensors are also used in air bag deployment, ride control systems, antilock brakes (ABS), traction, and inertial navigation systems. In this practice paper, we present the general design of smart wireless sensors. We also show the usefulness of such sensors in designing better automotive control and safety systems. For this research, we designed and built wireless sensor circuits to more precisely examine the real-time data, braking and acceleration forces. Results were verified experimentally by using wireless sensors embedded inside a fast rolling car tire/wheel. |
| Abstract: |
| This paper addresses relevant, practical issues on the specification of Toyota's electronic throttle control (ETC) system including the timing constraints. In this paper, we specify the high-level design of the system. We show several properties that an ETC controller must satisfy and show how to formalize these properties using RTL. |
| Abstract: |
| This paper examines Toyota's electronic throttle controller (ETC) problem. ETC for passenger cars is a safety-critical, embedded control system and it must meet very high reliability and safety requirements. ETC systems continue to increase in complexity, making formal specification and verification processes an essential component of the development of safer systems. There are two ways to represent the real-time system. Firstly, we can describe the system's structure and function by detailing its electrical, mechanical, and other components. Secondly, the real-time system's behavior as it responds to actions and events can be described. Then we can compare the system's specification to the safety assertion to show that the system meets the safety properties. |
| Abstract: |
| Microcontrollers account for more than 90% of total microprocessors sold, yet their capabilities are seldom explored in computer science courses. A simple 8-Bit microcontroller can be used in a computer language programming course to facilitate the study of computer architecture and fundamental programming concepts. Through hands-on experience, students can appreciate using a computer language such as Assembly or ADA to develop applications for embedded devices. ADA is not often used in small embedded systems because of ADA's high overhead. We can overcome this problem by using a subset of ADA, such as the Ravenscar Profile. The goal of this paper is to describe how ADA can be used to develop high-integrity real-time systems supporting the Ravenscar tasking model of ADA-05 on the Atmel AVR ATmega16 microcontroller. |
| Abstract: |
| The Priority-Based Functional Reactive Programming (P-FRP) paradigm, aims to improve the programming of embedded microcontrollers. The combination of purely functional programming and cleanly-abortable event handlers, communicating via transactional memory (TM), makes it possible to write programs as stateless collections of functions, thus making them amenable to proofs and type safety. P-FRP implements executions as function evaluations, therefore, there are no "incomplete" function evaluations, as in the case of a task's interruption. To use P-FRP in the SMP (Symmetric Multiprocessor) environment, we must first understand the response time of programs written in its anticipated multiprocessor extension. Therefore, the contribution of this paper is the response time analysis for the Abort-and-Restart (ANR) event handler semantics of P-FRP for SMP Real-Time systems. ANR is neither a synchronization protocol nor a true scheduling policy. Instead, it is a policy for running tasks where the most important task is scheduled first. Results are derived for both fixed-priority (i.e., Rate Monotonic) and dynamic-priority (i.e., Earliest Deadline First) scheduling. We can say that the Abort-and-Restart and the TM models are similar, but also distinct, thus allowing our results to be adaptable for the analysis of TM. |
| Abstract: |
| Programming microcontrollers is a different paradigm from microprocessor programming. The traditional way to program microcontrollers is to write the program in C or an assembly language, but modern embedded systems are more complex. The Priority-based Functional Reactive Programming (P-FRP) paradigm could make microcontroller programming better. P-FRP makes it possible to treat programs as functions (stateless) and amenable to proofs and type-safety. In this paper, we focus on the abort-and-restart event handler semantics of P-FRP, which is neither a concurrency control policy nor a true scheduling policy. Instead, it is a policy in which the most important task is scheduled first. This paper refines the response time analysis for the abort-and-restart model on single-core systems. |
| Abstract: |
| There has been significant study of implementations of a variety of priority inversion control algorithms in uniprocessor systems, but there has been far less work done on the multiprocessor implementations of these algorithms. Herein, we will present such an evaluation of the Multiprocessor Priority Ceiling Protocol (MPCP) and the Multiprocessor Stack Resource Policy (MSRP). To our knowledge, no such empirical evaluation of these two policies has been conducted prior to this. We will show that the results differ from the previous simulation-based studies and that both policies are more or less equally effective. The main difference is the MSRP's expense. We discuss the efficacy of Ada-2005 and C/POSIX. We also discuss the methods through which we have attempted to overcome Ada's weakness in mapping tasks to processors |