Experiments | ||
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Experiment #7 Sample D Flip-Flop Waveform |
This is the simulation of the positive edge-triggered D flip-flop. As you can see, Q
assumes the value of data only at the positive edge of the clock. This means that Q
can change value at most 1 time per clock cycle. This can be clearly seen during the interval from
180ns to 250ns. This is what is meant by edge triggered. |